Technical Session D


RADECS 2021 - Technical Program

Thursday, September 16, 2021 (starts at 9.10 h)

RADECS 2021 - Session D

Single Event Effects: Devices & ICs

Session Co-Chair:

Andrey Yanenko, National Research Nuclear University MEPhl
Juan Cueto Rodriguez, Thales Alenia Space Spain


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M. Rezaei1, A. Arinero Panduro2, F. Franco2, J. Fabero3, H. Mecha2, M. Letiche3, H. Puchner4, J. Clemente2

1 Universidad Complutense de Madrid / Departamento de Arquitectura de Computadores y Automática / Facultad de lnformática, Spain
2 Universidad Complutense de Madrid, Spain
3 Institut Laue Langevin, France
4 Infineon Technologies, USA


An experimental study on the cell-to-cell sensitivity of 65-nm, 90-nm and 130-nm volatile bulk COTS SRAMs to thermal neutron irradiation is presented. Results show a dependency between VDR and the number of bitflips after irradiation.

M. Trindade1, J. Brum1, L. Maldaner1, R. Garibotti2, L. Ost3, R. Possamai Bastos1

1 Laboratoire TIMA, France
2 School of Technology, Pontifical Catholic University of Rio Grande do Sul, Brazil
3 Loughborough University, United Kingdom


This paper compares the effectiveness of three machine learning models running on a low­-power processor under neutron radiation. Results suggest that our implementations retain a certain level of effectiveness even without mitigation techniques.

F. Benevenuti1, M. Gonçalves1, E. Pereira Jr2, R. Galhardo Vaz2, O. Gonçalez2, J. Azambuja1, F. Lima Kastensmidt1

1 Universidade Federal do Rio Grande do Sul, Brazil
2 Departamento de Ciência e Tecnologia Aeroespacial, Brazil


This work evaluates neutron-induced SEUs in image classification all-convolutional neural networks implemented an SRAM-based FPGA: one running in softcore GPU and one in HLS design. Reliability, area, execution time and power are discussed.



Session Chair:

Steven Witczak, Northrop Grumman

N. Guibbaud1, F. Miller1, T. Colladant2

2 DGA, France


In this paper we propose to measure Single-Event Transient (SET) cross section on the clock tree resources of FPGA towards radiations.


Z. Li1,2, L. Berti1, B. Vignon1, P. Leroux2

1 IMEC, Belgium
2 Leuven University, Belgium

This paper SET charge measurement circuits and results for a commercial 65 nm CMOS technology. The chip has been tested under the heavy-ion beam with an effective LET from 20.4 to 88.35 MeVcm2/mg.


T. Kraemer Sarzi Sartori1,2, H. Fourati2, M. Garay Trindade1, R. Possamai Bastos1

1 Université Grenoble Alpes/TIMA, France
2 Université Grenoble Alpes/GIPSA-Lab, France


This paper assesses the effectiveness of an Attitude Estimation (AE) processing system in tolerating neutron radiation-induced soft errors. Radiation tests have been conducted on an advanced AE algorithm running on a processing system neutron radiation.


J. Badia1, G. Leon1, J. Belloch2, A. Lindoso2, M. Garcia-Valderas2, L. Entrena2

1 Universitat Jaume I de Castellón, Spain
2 Universidad Carlos III de Madrid, Spain


In this paper we evaluate the influence of the parallelization strategy on the proton radiation reliability of LU decomposition on a GPU-accelerated System-on-Chip. More intensive utilization of GPU resources produce larger cross-sections.


S. Houssany1, N. Guibbaud1, F. Miller1, T. Cheviron1, T. Colladant2

1 Nuclétudes, France
2 DGA, France


An experimental test approach to sort the different kinds of SEFI in microprocessors is presented. lt relies on the configuration and use of the interrupt handler combined with an external watchdog.


E. Mrozovskaya1, P. Chubunov1, S. lakovlev2, G. Zebrev1

1 National Research Nuclear University MEPhl, Russian Federation
2 JSC Institute of Space Device Engineering, Russian Federation


The Single Event Latchup cross sections as functions of LET in different CMOS circuits were experimentally investigated at different temperatures. A simplified simulation method for the SEL cross section temperature dependence is proposed and validated.


A. Dufour1, J. Carron1, F. Pierron2, D. Dangla1, G. Bascoul1, F. Bezerra1, J. Mekki1, P. Maillard3

1 CNES, France
2 Bibench, France
3 Xilinx, USA


This paper presents the test setup and first SEL results recently obtained under heavy ions on 7nm FinFET Xilinx Versal™, the latest product proposed by Xilinx. We also analyze small current variations observed under beam.


D. Agiakatsikas1, N. Foutris2, A. Sari1, V. Vlagkoulis1, I. Souvatzoglou1, M. Psarakis1, M. Lujan2, M. Kastriotou3, C. Cazzaniga3

1 Dept. of Informatics, University of Piraeus, Greece
2 Dept. of Computer Science, The University of Manchester, United Kingdom
3 ISIS Facility, STFC, Rutherford Appleton Laboratory, United Kingdom


The paper studies the dependability of the Xilinx Deep-Learning Processing Unit (DPU) under neutron irradiation. It analyzes the impact of SEEs on the accuracy of a DPU running the resnet50 model on a Ultrascale+ MPSoC.