After a brief review of total dose and single event radiation effects in deep sub-micron CMOS technologies, we will look at the different levels of radiation hardening by design. Most attention will be paid to circuit architecture and layout techniques for radiation hardening of analog, mixed signal and digital integrated circuits. Layout techniques include the gate enclosed layout of transistors, H-gate transistors, width/length scaling, interdigitation, dummy elements, latch-up protection and layout optimization for compacting triple modular redundancy.
Circuit techniques that will be covered include the use of feedback, feedforward, bias optimization, translinear circuits, dynamic leakage compensation, switching, chopping and offset compensation, capacitive and resistive decoupling, spatial and temporal redundancy, interlocking, error-correcting codes, memory scrambling and scrubbing and data path error detection and correction techniques.
All techniques will be explained and illustrated with concrete design examples of amplifiers, data converters, transceiver circuits, Phase-Locked Loops, Time-to-Digital Converters, SRAM memory and several digital circuits. We will also illustrate typical testing strategies for radiation hardness assurance which are an integral part of the radhard by design process.
o Review of TID effects and SEEs in CMOS
o Levels of radiation hardening
Layout techniques for radiation hardening of analog and digital ASICs
Circuit techniques for radiation hardening of analog and digital ASICs
Testing for radiation hardness assurance
Prof. Paul Leroux was born in Eeklo, Belgium in 1975. He received the M.Sc. degree and Ph.D. degree in electronic engineering from the KU Leuven (University of Leuven), Belgium, in 1999 and 2004, respectively. From 1999 to 2004, he was a Teaching and Research Assistant within the MICAS research group of the KU Leuven Department of Electrical Engineering (ESAT). In 2009 he was appointed as professor at the KU Leuven, Dept. of Electrical Engineering (ESAT), where he founded the ADVISE research lab and headed the Electrical Engineering (ESAT) Technology Cluster from November 2011 to July 2016. Since August 2016 he is Campus Chair of KU Leuven, Geel Campus.
His research activities within the ADVISE research group focus on radiation hardened analog and mixed-signal IC design for communication and instrumentation in space, high-energy physics and nuclear energy applications. His group is part of the CERN CMS collaboration where Prof. Leroux is acting as KU Leuven team leader. Prof. Leroux is also Program Director of the European Joint Master in Radiation and its Effect on Microelectronic and Photonic Technologies (RADMEP). Paul Leroux has (co)authored over 200 papers in international journals and conference proceedings. In 2010, he received the SCK-CEN Prof. Roger Van Geen Award from the FWO and FNRS for his highly innovative work on IC design for harsh radiation environments. Prof. Leroux is Senior Member of IEEE.
Prof. Jeffrey Prinzie received is M.Sc. degree from the KU Leuven association in 2013. During his PhD, he worked in the field of radiation tolerant integrated circuits with the ADVISE research group at the department of Electrical Engineering (ESAT) KU Leuven. He has a strong track record on the radiation hardening of RF and digital assisted mixed-signal circuits, especially PLLs, oscillators and TDCs, both basic and applied research. He gained experience in the design and experimental testing of these circuits in nuclear facilities. He is associated with the CERN micro-electronics research group and CMS experiment and worked on a Time-to-Digital Converter (TDC) SoC and high speed multi-gigabit transceiver for the CERN experiments.
In 2017, he received his PhD and continued his post-doctoral research funded by an FWO fellowship. From 2018-2019, he worked with Mediatek (United Kingdom) as a visiting researcher on ultra-fast locking all-digital synthesizers for 5G communication systems. In 2020, he was appointed assistant professor at KU Leuven. He is focusing on RF and digital intensive integrated circuits such as All-digital frequency synthesizers, fast time-to-digital converters, fault tolerant digital implementations and digitally assisted communication systems for harsh environments. He has co-authored over 30 publications in international journals and conference proceedings and published an academic book.