Abstract
Development of a Rad-Hard FPGA with ultra-deep sub-micron Technology for New Space Applications
Sarah Azimi1, Giorgio Cora1, Aobo Cui1, Corrado De Sio1, Luca Sterpone1, Eleonora Vacca1, Alp Kilic2
1 Politecnico di Torino
2 Nanoxplore
Abstract
Field-programmable gate arrays (FPGAs) are crucial in space applications, enabling advanced communications, instruments, and systems that are essential for the next generation of space missions. Their versatility and reconfigurability make FPGAs invaluable for tackling the demanding and ever-evolving challenges of the space industry. In the last decade, the semiconductor industry has contributed drastically to the performance improvement of radiation-hardened FPGAs thanks to the continuous scaling in the transistor size [1]. The device scaling continued to 14nm toward 7nm, thanks to the FinFET multi-gate devices that have been introduced into the manufacturing processes. In this work, we present the development status of a radiation-hardened FPGA using 7nm FinFET ultra-deep submicron technology [2]. The new radiation-hardened FPGA architecture will target future requirements for high-performance computation in space, it will support the future application demands [3]. The design of the new FPGA architecture involves the design of a new 7nm LUT structure, a new interconnection switch-matrix, and the internal computational building blocks focused on computing acceleration. The presentation will provide an overview of test and validation methodologies relevant to establishing the radiation-hardened capabilities in different space environments, ranging from Low Earth Orbit to the deep-space.
References
[1] S. Azimi, C. De Sio, A. Portaluri, D. Rizzieri, L. Sterpone, “A comparative radiation analysis of reconfigurable memory technologies: FinFET versus bulk CMOS”, Microelectronics Reliability, Volume 138, 2022, 114733, ISSN 0026-2714, doi: 10.1016/j.microrel.2022.114733.
[2] S. Azimi, C. De Sio, L. Sterpone, “Analysis of radiation-induced transient errors on 7 nm FinFET technology”, Microelectronics Reliability, Volume 126, 2021, ISSN 0026-2714, doi: 10.1016/j.microrel.2021.114319.
[3] A. Portaluri, S. Azimi and L. Sterpone, "Design Techniques for Multi-Core Neural Network Accelerators on Radiation-Hardened FPGAs," 2023 22nd International Symposium on Parallel and Distributed Computing (ISPDC), Bucharest, Romania, 2023, pp. 16-22, doi: 10.1109/ISPDC59212.2023.00023.
Acknowledgments
This work is related to the PUMA project funded by the European Commission via the EU Space R&I Programme under grant N° 101189992