Abstract
Single Event Effects in Non-volatile Memories for Small Satellites
Simone Gerardin1, Marta Bagatin1, Alessandro Paccagnella1, Peter Beck2, Christoph Tscherne2, Michael Wind2, Marc Poizat3
1 University of Padova – Department of Information Engineering, Italy
2 Seibersdorf Labor GmbH, Austria
3 European Space Agency, ESA
Abstract
Microcontrollers and FPGAs used in small satellites require low-footprint non-volatile memories (NVM) for configuration, code, and data storage purposes. The Serial Peripheral Interface (SPI) is a standard low-pin count interface that allows for simplified routing and small board area occupation and it is therefore well suited for this kind of application. On the other side, the Flash NOR interface has a larger pin-count and footprint, but provides faster random access.
In this talk we will show the results of Single Event Effects (SEE) tests performed on NVMs, in the frame of the project CORHA (COTS Radiation Hardness Assurance), funded by the European Space Agency. We will present SEE data on three SPI memories and one NOR Flash memory, to address the needs of small satellites. The SPI NVMs are manufactured with two different technologies, charge trap and ferroelectric RAM. The NOR Flash memory employs the floating gate technology.
References
[1] M. Poizat, A. Zadeh, C. Poivey, R. Walker, “Radiation Hardness Assurance for Commercial-Off-The-Shelf (COTS) components for Small Satellites”, RADHARD Symposium 2018, www.seibersdorf-laboratories.at/en/radhard/archive/2018-radhard-symposium, ISBN (Print) 978-3-902780-12-6, ISBN (Ebook) 978-3-902780-13-3, Editor: Peter Beck, Seibersdorf Labor GmbH, 2444 Seibersdorf, Austria, Publisher: Seibersdorf Laboratories Publishing, Austria, April 2018.
[2] P. Beck, M. Bagatin, S. Gerardin, M. Latocha, Alessandro Paccagnella, C. Tscherne, M. Wind, M. Poizat, “CORHA - Radiation Screening of COTS Components and Verification of COTS RHA Approach”, RADHARD Symposium 2019